1. Field of the Invention
The embodiments relate generally to semiconductor structures and, more particularly, to a silicon-on-insulator (SOI) structure configured for reduced harmonics and a method of forming the structure.
2. Description of the Related Art
Silicon-on-insulator (SOI) structures typically comprise a silicon substrate, an insulator layer (e.g., a buried oxide (BOX) layer) above the substrate, and device layer (i.e., a silicon layer from which integrated circuit devices are formed) above the insulator layer. Such SOI structures offer a number of advantages over bulk silicon structures with respect to the formation of integrated circuit devices generally (e.g., reduction in parasitic capacitances, elimination of latch-up, better control of short channel effects, etc.). However, at least one disadvantage has been noted with respect to the formation of radio frequency (RF) switches using conventional SOI substrates.
Specifically, the Federal Communications Commission (FCC) has set limits (i.e., specifications) on harmonics generation in RF switch applications. Unfortunately, an RF switch formed using a conventional SOI substrate oftentimes will generate second and third order harmonics beyond the FCC limits. That is, in the case of an RF switch on a conventional SOI substrate, a fixed charge (i.e., a trapped charge) either within the insulator layer or at the interface between the insulator layer and the silicon substrate can result in an inversion charge at the top surface of the silicon substrate adjacent to the insulator layer. This inversion charge can result in the generation of harmonics, including second and third order harmonics. Harmonics are generated when the impedance characteristic of a circuit is not constant with an input signal. A second order harmonic is typically seen from a linear response in impedance (i.e., when impedance is a function of the input signal). A third order harmonic is typically seen from a quadratic response in impedance (i.e., when impedance is a function of the square of the input signal). Considering these second and third order harmonics, the resulting RF switch may easily exhibit harmonics beyond the FCC limits. Therefore, there is a need in the art for a SOI structures configured for reduced harmonics and a method of forming the structure.